Senior Physical Design En... 23k-30k

Responsibilities :
1. Own physical design and flow development from gate-level netlist to GDSII in 28 nm / 16 nm / 7 nm / 5 nm / 3 nm nodes, including floor planning, power planning/analysis, place-and-route, static timing analysis, physical verification and sign-off.
2. Deliver IP hardening/integration and verification.
3. Collaborate with cross-functional teams to drive design convergence and PPA optimization.
4. Perform additional duties assigned by the line manager.


Qualifications:
1. Bachelor’s degree or above in Microelectronics, IC, Physics, Materials or related field
2. Minimum of 3 years of relevant experience.
3. Strong ability to understand and articulate technical issues.
4. Master’s degree or relevant project/intern experience is a plus.
Self-motivated, good communicator and team player.